maybe being memory bandwidth starved is intentional? Cores are relatively cheap these days (not much silicon area, power proportional to instructions process

maybe being memory bandwidth starved is intentional? Cores are relatively cheap these days (not much silicon area, power proportional to instructions processed). Whereas cache uses a lot of silicon area (expensive), and memory bandwidth/data transfer costs power. Speculative memory reads trade lots of memory bus capacity and power for performance. Therefore, for maximum compute per watt and compute per dollar, you probably want excess cores and to make sure you fully utilize any cache and memory bandwidth. You don't do much speculative read-ahead and you accept lower per-core performance to get more throughput per dollar.