2 ms·
>the RISCiest of the CISCs and the CISCiest of the RISCs. A happy medium. Until RISC-V enters the conversation.
by snvzz 2y ago
>the RISCiest of the CISCs and the CISCiest of the RISCs. A happy medium.
Until RISC-V enters the conversation.
- thechao 2y agoIf you actually dig into the details of RISC-V — especially the variable width extensions, it scratches all of my CISC-y itches just fine. Is it as CISC-y as ARM or x86? Not yet; not yet.