3 ms·
That relies on hardware support in the TLB. If you need TLB support for "please don't corrupt this page" you might as well get hardware with ECC in caches and R
by smallpipe 2y ago
That relies on hardware support in the TLB. If you need TLB support for "please don't corrupt this page" you might as well get hardware with ECC in caches and RAMs
- magicalhippo 2y agoWhich relies on three components supporting ECC, not just one. But sure, ECC all around would be best. Btw, it was my understanding that CPU caches already use ECC?