3 ms·

Why not ECC CPUs and GPUs? They can be hit by cosmic rays too.

adrian_b 2y ago
Almost all CPUs (except perhaps some very cheap microcontrollers) already use ECC for their internal cache memories, because those are even more prone to errors than the external DRAM. Consumer GPUs, which do not have ECC, are notorious for frequent errors when they are used for general-purpose computation tasks instead of graphics or AI applications (where errrors happen, but they usually do not matter), so for any important computation it is recommended to repeat it and compare the results.
- caf 2y ago
  If the CPU exposes statistics from the internal cache ECC, I wonder if you could use that as a rough radiation sensor?
  - adrian_b 2y ago
    Most CPUs do not document the details of the cache controllers, so typically you cannot know when correctable errors happened. Only when non-correctable errors happen, which should be very seldom (e.g. less than one per year), the CPU generates a machine error exception, for which it can be identified that the cause was a (multiple-bit) error in one of the internal cache memories. Therefore you could sense only extremely-high radiation levels, which would also require a customized OS kernel to recover from exceptions without crashes. Such great radiation levels could be much easier detected with some discrete reverse-biased diodes, which are also easier to place wherever the radiation exists, keeping the microcontroller or whatever device records the radiation levels either away or shielded from the radiation.
    - caf 2y ago
      Yes, it was correctable errors I was thinking of. Not too surprising that they don't expose those statistics, I guess - it probably doesn't even count them.
- nextaccountic 2y ago
  What about ECC for the logic circuits of CPUs? Like, some form of redundancy that enables detection and correction of logical errors caused by some kind of malfunctioning in circuits that do computation (perhaps caused by cosmic rays or something)
  - adrian_b 2y ago
    The makers of server CPUs have always claimed that those have additional "RAS" (Reliability, availability and serviceability) features in comparison with consumer CPUs. Nevertheless, I have never seen such a vendor giving a non-fuzzy description of those features. Moreover, after the sinking of Itanium, except for IBM the other server CPU makers use CPU cores that are also designed for consumer applications, so at most the server CPUs may have additional redundancy in some execution units (for validating the results) that is disabled in the consumer variants, to reduce the power consumption. However if that were true I do not see why the CPU vendors would not brag about it, to justify the premium price that is requested for the server CPUs. For the applications that need very high reliability, it appears that in most cases it is preferable to use multiple CPUs operating in lock-step, which can be compared, ensuring that errors will be detected regardless in which part of the CPU they appear, instead of attempting to use a single CPU that is extremely fault-tolerant by using specially designed redundant execution units (because errors can appear anywhere, including on interconnections and buffers).
sufehmi 2y ago
GPUs have ECC, it can be enabled anytime, see https://discourse.codinghorror.com/t/to-ecc-or-not-to-ecc/3771/64 https://discourse.codinghorror.com/t/to-ecc-or-not-to-ecc/37...

Almost all CPUs (except perhaps some very cheap microcontrollers) already use ECC for their internal cache memories, because those are even more prone to errors than the external DRAM. Consumer GPUs, which do not have ECC, are notorious for frequent errors when they are used for general-purpose computation tasks instead of graphics or AI applications (where errrors happen, but they usually do not matter), so for any important computation it is recommended to repeat it and compare the results.

caf 2y ago
If the CPU exposes statistics from the internal cache ECC, I wonder if you could use that as a rough radiation sensor?
- adrian_b 2y ago
  Most CPUs do not document the details of the cache controllers, so typically you cannot know when correctable errors happened. Only when non-correctable errors happen, which should be very seldom (e.g. less than one per year), the CPU generates a machine error exception, for which it can be identified that the cause was a (multiple-bit) error in one of the internal cache memories. Therefore you could sense only extremely-high radiation levels, which would also require a customized OS kernel to recover from exceptions without crashes. Such great radiation levels could be much easier detected with some discrete reverse-biased diodes, which are also easier to place wherever the radiation exists, keeping the microcontroller or whatever device records the radiation levels either away or shielded from the radiation.
  - caf 2y ago
    Yes, it was correctable errors I was thinking of. Not too surprising that they don't expose those statistics, I guess - it probably doesn't even count them.
nextaccountic 2y ago
What about ECC for the logic circuits of CPUs? Like, some form of redundancy that enables detection and correction of logical errors caused by some kind of malfunctioning in circuits that do computation (perhaps caused by cosmic rays or something)
- adrian_b 2y ago
  The makers of server CPUs have always claimed that those have additional "RAS" (Reliability, availability and serviceability) features in comparison with consumer CPUs. Nevertheless, I have never seen such a vendor giving a non-fuzzy description of those features. Moreover, after the sinking of Itanium, except for IBM the other server CPU makers use CPU cores that are also designed for consumer applications, so at most the server CPUs may have additional redundancy in some execution units (for validating the results) that is disabled in the consumer variants, to reduce the power consumption. However if that were true I do not see why the CPU vendors would not brag about it, to justify the premium price that is requested for the server CPUs. For the applications that need very high reliability, it appears that in most cases it is preferable to use multiple CPUs operating in lock-step, which can be compared, ensuring that errors will be detected regardless in which part of the CPU they appear, instead of attempting to use a single CPU that is extremely fault-tolerant by using specially designed redundant execution units (because errors can appear anywhere, including on interconnections and buffers).

sufehmi 2y ago

GPUs have ECC, it can be enabled anytime, see https://discourse.codinghorror.com/t/to-ecc-or-not-to-ecc/3771/64 https://discourse.codinghorror.com/t/to-ecc-or-not-to-ecc/37...