Because it’s easy to ‘cache’ the entire memory of the host system, it’s better described as a new computer that only slows down to access the memory locations t

Because it’s easy to ‘cache’ the entire memory of the host system, it’s better described as a new computer that only slows down to access the memory locations that affect I/O (video, audio, keyboard, I/O ports, etc.) https://www.e-basteln.de/computing/65f02/65f02/ https://www.e-basteln.de/computing/65f02/65f02/: “The idea is to use this as a “universal” accelerator for 6502 and 65C02-based host computers – just plug it into the CPU socket. The only thing the FPGA board needs to know about its host is the memory map: Where does the host have memory-mapped I/O? Up to 16 different memory maps can be stored in the FPGA, and selected via a mini DIP switch. Upon power-on, the 65F02 grabs the complete RAM and ROM content from the host and copies it into the on-chip RAM, except for the I/O area. Then the CPU gets going, using the internal memory at 100 MHz for all bus accesses except for any I/O addresses – for these, the internal CPU pauses, and an external bus cycle is started at whatever the external clock speed is.”