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Note that this board runs RK1's (which use the RK3588 SoC), not Raspberry Pis. It burns 18.5W with CPU cores maxed out, producing 224 Gflops of compute (see: h

Note that this board runs RK1's (which use the RK3588 SoC), not Raspberry Pis. It burns 18.5W with CPU cores maxed out, producing 224 Gflops of compute (see: https://github.com/geerlingguy/top500-benchmark/issues/27 https://github.com/geerlingguy/top500-benchmark/issues/27). Efficiency-wise, it's a little more power efficient than at least last-gen AMD/Intel chips, and a little less than Ampere CPUs and Apple's M1. I haven't had a chance to compare to M2/M3 for power efficiency yet. The Turing Pi 2 has a BMC that allows out-of-band management, and the firmware is fairly stable at this point, and the community helped build a nice CLI for it so IMO it's even nicer (from automation/remote sysadmin aspect) than IPMI for some things. There's no remote VNC/display, but these aren't meant to have displays (even though node 1 has HDMI routed to a connector on the back). The most crippling thing for my use cases is the single 1 Gbps connection externally, and the internal 1 Gbps Ethernet switching. It'd be nice if it did at least 2.5 Gbps.

nubinetwork 3y ago
> The most crippling thing for my use cases is the single 1 Gbps connection externally, and the internal 1 Gbps Ethernet switching. It'd be nice if it did at least 2.5 Gbps. Their Github seems to suggest they're working on getting both jacks working at the same time... it's been a couple days since I last checked, so they might have it working now.
dragontamer 3y ago
Xeons / AMD EPYCs are measured in (low single-digit) TFlops, not GFlops. AVX512 gets places, especially with Fused Multiply-accumulate (FMA) instructions and multiple pipelines. That the thing though: TFlops is still "weak" because GPU market crushes Linpack so hard its just not comparable. But I'd assume that your typical Xeon D will run circles around these other cores watt-for-watt. Its the GPUs that Xeon D is competing with and struggling with. But if we're talking about a bunch of CPU-style compute (non-Linpack workloads), or even the occassional matrix-multiply, its hard to beat Xeon or EPYC in cost and power-efficiency. And you certainly ain't gonna beat a Xeon or EPYC with tiny ARM chips right now.
- justinclift 3y ago
  > And you certainly ain't gonna beat a Xeon or EPYC with tiny ARM chips right now. Do you include Apple's M family in that list of tiny ARM chips?
  - dragontamer 3y ago
    That's an edge case. But I'm mostly talking about RK1 or Rasp. Pi 5. I'm well aware of "large" ARM chips like Fujitsu A64FX ARM that did well (when it came out) in terms of Linpack performance, thanks to hugely efficient designs like HBM and 512-bit SVE. I'm not very well aware of what Apple M1 offers to the table, I know some people are experimenting with it but its a far larger chip than RK1 or Rasp. Pi. But its probably smaller than A64FX. I know that Apple M1 has only 128-bit vectors though, so that's a big penalty vs AVX512 or even the older Fujitsu A64FX. I'd expect them to be bad at Linpack / Matrix multiplication as this is where SIMD shines exceptionally well... and AVX512 on Xeon is a very good SIMD implementation. I recognize Apple M1 has multiple 128-bit pipelines that operate in parallel per core, so its better than it looks, but there's a huge power-efficiency advantage to 512-bit sized vector units in the Linpack-style matrix-multiplication code.
    - tubs 3y ago
      M chips has some matrix multipliers in hardware as well.
- geerlingguy 3y ago
  I thought we were talking about Xeon D (1700 series specifically called out)—the typical CPUs in that range are in the low 100s of Gflops, similar to the performance of this 4 node cluster of RK3588s. Obviously, throw a 64, 96, or 128+ core EPYC or the latest Xeons at it and that will make it cry (while gobbling up hundreds of watts doing so ;) Only the Xeon D-2700 series starts touching above 500 Gflops in that generation, and those CPUs (just the CPUs, mind you) are in the $1000-2000 range, over 100W TDP.
  - dragontamer 3y ago
chokolad 3y ago
> Note that this board runs RK1's (which use the RK3588 SoC), not Raspberry Pis. Turing Pi 2 was designed to run Paspberry Pi CM4 via adapter as well as Jetson Nano (?). RK1 is somewhat recent development that was shipped way after Turing Pi2 release.
- geerlingguy 3y ago
  I'm specifically calling out the build and SoM's that were mentioned in the OP here.

nubinetwork 3y ago

> The most crippling thing for my use cases is the single 1 Gbps connection externally, and the internal 1 Gbps Ethernet switching. It'd be nice if it did at least 2.5 Gbps. Their Github seems to suggest they're working on getting both jacks working at the same time... it's been a couple days since I last checked, so they might have it working now.

dragontamer 3y ago

Xeons / AMD EPYCs are measured in (low single-digit) TFlops, not GFlops. AVX512 gets places, especially with Fused Multiply-accumulate (FMA) instructions and multiple pipelines. That the thing though: TFlops is still "weak" because GPU market crushes Linpack so hard its just not comparable. But I'd assume that your typical Xeon D will run circles around these other cores watt-for-watt. Its the GPUs that Xeon D is competing with and struggling with. But if we're talking about a bunch of CPU-style compute (non-Linpack workloads), or even the occassional matrix-multiply, its hard to beat Xeon or EPYC in cost and power-efficiency. And you certainly ain't gonna beat a Xeon or EPYC with tiny ARM chips right now.

justinclift 3y ago
> And you certainly ain't gonna beat a Xeon or EPYC with tiny ARM chips right now. Do you include Apple's M family in that list of tiny ARM chips?
- dragontamer 3y ago
  That's an edge case. But I'm mostly talking about RK1 or Rasp. Pi 5. I'm well aware of "large" ARM chips like Fujitsu A64FX ARM that did well (when it came out) in terms of Linpack performance, thanks to hugely efficient designs like HBM and 512-bit SVE. I'm not very well aware of what Apple M1 offers to the table, I know some people are experimenting with it but its a far larger chip than RK1 or Rasp. Pi. But its probably smaller than A64FX. I know that Apple M1 has only 128-bit vectors though, so that's a big penalty vs AVX512 or even the older Fujitsu A64FX. I'd expect them to be bad at Linpack / Matrix multiplication as this is where SIMD shines exceptionally well... and AVX512 on Xeon is a very good SIMD implementation. I recognize Apple M1 has multiple 128-bit pipelines that operate in parallel per core, so its better than it looks, but there's a huge power-efficiency advantage to 512-bit sized vector units in the Linpack-style matrix-multiplication code.
  - tubs 3y ago
    M chips has some matrix multipliers in hardware as well.
geerlingguy 3y ago
I thought we were talking about Xeon D (1700 series specifically called out)—the typical CPUs in that range are in the low 100s of Gflops, similar to the performance of this 4 node cluster of RK3588s. Obviously, throw a 64, 96, or 128+ core EPYC or the latest Xeons at it and that will make it cry (while gobbling up hundreds of watts doing so ;) Only the Xeon D-2700 series starts touching above 500 Gflops in that generation, and those CPUs (just the CPUs, mind you) are in the $1000-2000 range, over 100W TDP.
- dragontamer 3y ago

chokolad 3y ago

> Note that this board runs RK1's (which use the RK3588 SoC), not Raspberry Pis. Turing Pi 2 was designed to run Paspberry Pi CM4 via adapter as well as Jetson Nano (?). RK1 is somewhat recent development that was shipped way after Turing Pi2 release.

geerlingguy 3y ago
I'm specifically calling out the build and SoM's that were mentioned in the OP here.