4 ms·
The wafer is thick. Let's call it a mm thick (not quite, but close). Devices are tiny. The claim is 1.6nm, which isn't quite true, but let's pretend it is, sinc
by blagie 2y ago
The wafer is thick. Let's call it a mm thick (not quite, but close). Devices are tiny. The claim is 1.6nm, which isn't quite true, but let's pretend it is, since for the qualitative argument, it doesn't make a difference. That's on the order of a million times smaller than the thickness of the wafer.
Historically, everything was etched, grown, deposited, and sputtered on one side of the wafer. The rest of the wafer was mostly mechanical support. The other side of the wafer is a universe away.
The world is more complex today, but that's a good model to keep in mind.
For a 3d integrated circuit, you would do this, and then e.g. grind away the whole wafer, and be left with a few micron thick sheet of just the electronics, which you'd mechanically place on top of another similar sheet. That's every bit as complex as it sounds. That's why this was restricted to very high-end applications.
As for whether the wafer is a huge ground plane, that's complex too, since it depends on the top of the device and the IC:
* First, it's worth remembering a pure silicon crystal is an insulator. It's only when you dope it that it becomes a conductor. The wafer starts out undoped.
* Early ICs had the whole wafer doped, and the collector of all the NPN transistors was just the wafer. There, it was a ground plane.
* SOI processes deposit a layer of glass on top of the wafer, and everything else on the glass. There, the wafer is insulated from the circuit.
So all of this can very quickly go in many directions, depending on generation of technology and application.
I'm not sure this post is helpful, since it's a lot of complexity in an ELI5, so I'll do a TL;DR: It's complicated. (or: Ask your dad)
- 1oooqooq 2y agonow I'm even more confused. why start with Si if you're going to put a glass layer before anything else? why not start with glass right away?
- blagie 2y agoErgo, the TL;DR :) Even so, I oversimplified things a lot (a lot of the processes to leverage the silicon wafer, but some don't): https://en.wikipedia.org/wiki/Silicon_on_insulator https://en.wikipedia.org/wiki/Silicon_on_insulator One of the things to keep in mind is that a silicon wafer starts with a near-perfect silicon ingot crystal: https://en.wikipedia.org/wiki/Monocrystalline_silicon https://en.wikipedia.org/wiki/Monocrystalline_silicon The level of purity and perfection there is a little bit crazy to conceive. It's also worth noting how insanely tiny devices are. A virus is ≈100nm. DNA is 2nm diameter. We're at << 10nm for a device. That's really quite close to atomic-scale. There are something like ≈100 billion transistors per IC for something like a high-end GPU, and a single failed transistor can destroy that fancy GPU. That's literally just a few atoms out-of-place or a few atoms of some pollutant. The level of perfection needed is insane, and the processes which go into that are equally insane. We are making things on glass, but the glass has to be nearly perfect glass.
- Detrytus 2y ago>> There are something like ≈100 billion transistors per IC for something like a high-end GPU, and a single failed transistor can destroy that fancy GPU. No, it can't thanks to this fancy marketing strategy where you sell faulty GPUs at lower price, as lower-tier model.
- rcxdude 2y agocan is important there. Not all failures can be masked off. And this only makes the slightest of dent in the level of reliability you need in making any given transistor.
- gregw2 2y agoThe demand for perfection is mildly ameliorated by having a few redundant circuits and microcode and then a software layer that can detect and workaround defects. If your GPU loses one if its 1000 integer math units, it doesn’t die, it just slows down for an operation that might otherwise use that one.