4 ms·

Wow that is a great side-project, and a great README to boot. I've been meaning on working through Nand to Tetris after playing around some with Ben Eater's 650

by rpmw 2y ago

Wow that is a great side-project, and a great README to boot. I've been meaning on working through Nand to Tetris after playing around some with Ben Eater's 6502 Computer (https://eater.net/ https://eater.net/)

laweijfmvo 2y ago
Would it be at all feasible to build a physical NAND-to-tetris computer? Or is it purely a virtual exercise?
- dailykoder 2y ago
  Probably doable, but takes a lot of dedication. Especially debugging such physical endeavors is crazy
- ArchAndStarch 2y ago
  A few nand2tetris fanatics have actually done this! And by a few, I mean quite a lot of people. Here's one such hardware project of nand2tetris: https://gitlab.com/x653/nand2tetris-fpga/ https://gitlab.com/x653/nand2tetris-fpga/ But you can Google "nand2tetris fpga" for more.
- moefh 2y ago
  There's this one that goes one step beyond that, it's built out of 40,000 discrete transistors: https://www.youtube.com/watch?v=z71h9XZbAWY https://www.youtube.com/watch?v=z71h9XZbAWY EDIT: there's more information here: https://www.megaprocessor.com/ https://www.megaprocessor.com/
  - dhosek 2y ago
    I kind of want something midway between the FPGA version and the all-transistor version, something that just uses 7400 series chips (or, presumably there’s a 26-pin equivalent with 6 gates instead of three). Heck, I think even something that goes ahead and uses the full panoply of basic logic chips available could be kind of cool to see.
    - moefh 2y ago
      I think Ben Eater's 8-bit computer is closer to what you want: https://eater.net/8bit/ https://eater.net/8bit/ It's been a few years since I studied it (I even built the clock module, registers and the ALU), but from what I remember the biggest departing point from what you want is that the control logic (from instruction decoding to deciding which sub-units to activate for each instruction) is done with an EEPROM instead of individual logic gates, as described here: https://eater.net/8bit/control https://eater.net/8bit/control
    - cellularmitosis 2y ago
      Slu4 has a great series of videos about exactly what you are looking for, with his Minimal 64 computer https://youtu.be/FJsnKu20ch8 https://youtu.be/FJsnKu20ch8 61 TTL chips mentioned in this 8 minute overview https://youtu.be/3zGTsi4AYLw https://youtu.be/3zGTsi4AYLw
- djmips 2y ago
  A friend and myself made a working one in FPGA for a game jam. He did the hardware and I wrote a game in the Jack language. It displayed on a VGA monitor.

by rpmw 2y ago

laweijfmvo 2y ago

Would it be at all feasible to build a physical NAND-to-tetris computer? Or is it purely a virtual exercise?

dailykoder 2y ago
Probably doable, but takes a lot of dedication. Especially debugging such physical endeavors is crazy
ArchAndStarch 2y ago
A few nand2tetris fanatics have actually done this! And by a few, I mean quite a lot of people. Here's one such hardware project of nand2tetris: https://gitlab.com/x653/nand2tetris-fpga/ https://gitlab.com/x653/nand2tetris-fpga/ But you can Google "nand2tetris fpga" for more.
moefh 2y ago
There's this one that goes one step beyond that, it's built out of 40,000 discrete transistors: https://www.youtube.com/watch?v=z71h9XZbAWY https://www.youtube.com/watch?v=z71h9XZbAWY EDIT: there's more information here: https://www.megaprocessor.com/ https://www.megaprocessor.com/
- dhosek 2y ago
  I kind of want something midway between the FPGA version and the all-transistor version, something that just uses 7400 series chips (or, presumably there’s a 26-pin equivalent with 6 gates instead of three). Heck, I think even something that goes ahead and uses the full panoply of basic logic chips available could be kind of cool to see.
  - moefh 2y ago
    I think Ben Eater's 8-bit computer is closer to what you want: https://eater.net/8bit/ https://eater.net/8bit/ It's been a few years since I studied it (I even built the clock module, registers and the ALU), but from what I remember the biggest departing point from what you want is that the control logic (from instruction decoding to deciding which sub-units to activate for each instruction) is done with an EEPROM instead of individual logic gates, as described here: https://eater.net/8bit/control https://eater.net/8bit/control
  - cellularmitosis 2y ago
    Slu4 has a great series of videos about exactly what you are looking for, with his Minimal 64 computer https://youtu.be/FJsnKu20ch8 https://youtu.be/FJsnKu20ch8 61 TTL chips mentioned in this 8 minute overview https://youtu.be/3zGTsi4AYLw https://youtu.be/3zGTsi4AYLw
djmips 2y ago
A friend and myself made a working one in FPGA for a game jam. He did the hardware and I wrote a game in the Jack language. It displayed on a VGA monitor.