https://www.imec-int.com/en/articles/how-power-chips-backside https://www.imec-int.com/en/articles/how-power-chips-backsid... has some explanation that's a bit

https://www.imec-int.com/en/articles/how-power-chips-backside https://www.imec-int.com/en/articles/how-power-chips-backsid... has some explanation that's a bit beyond ELI5, but they have 2 pictures: frontside: https://www.imec-int.com/_next/image?url=%2Fsites%2Fdefault%2Ffiles%2F2022-11%2Fimec%2520-%2520Figure%25201%2520-%2520Frontside%2520power%2520delivery.png&w=1280&q=75 https://www.imec-int.com/_next/image?url=%2Fsites%2Fdefault%... backside: https://www.imec-int.com/_next/image?url=%2Fsites%2Fdefault%2Ffiles%2F2022-11%2Fimec%2520-%2520Figure%25202%2520-%2520Backside%2520power%2520delivery%2520-%2520concept.png&w=1280&q=75 https://www.imec-int.com/_next/image?url=%2Fsites%2Fdefault%... Another graphic samsung used: https://www.thelec.net/news/photo/202210/4238_4577_1152.jpg https://www.thelec.net/news/photo/202210/4238_4577_1152.jpg From https://www.tomshardware.com/pc-components/cpus/samsung-to-introduce-backside-power-delivery-to-2nm-class-production-node-report https://www.tomshardware.com/pc-components/cpus/samsung-to-i... > Typically, backside power delivery enables thicker, lower-resistance wires, which can deliver more power to enable higher performance and save power. Samsung's paper noted a 9.2% reduction in wiring length, enhancing performance