3 ms·

I wish we could mix 'I don't care about side channels, use them all' with 'I'm paranoid about side channels, plug them all' on the same machine. Disable specula

I wish we could mix 'I don't care about side channels, use them all' with 'I'm paranoid about side channels, plug them all' on the same machine. Disable speculative execution on one core, no frequency adjustment, no prefetching, sr-io/pcie-bypass some devices... E-cores but for the side-channel-paranoid (in a good way).

smallmancontrov 3y ago
Bring back EIEIO, like on Old Macs, but perhaps with a slightly expanded definition of what constitutes I/O: Enforce In-order Execution of I/O (EIEIO) is an assembly language instruction used on the PowerPC central processing unit (CPU) which prevents one memory or input/output (I/O) operation from starting until the previous memory or I/O operation completed. This instruction is needed ] as I/O controllers on the system bus require that accesses follow a particular order, while the CPU reorders accesses to optimize memory bandwidth usage.
- colejohnson66 3y ago
  You mean memory fences? The big architecture (x86, ARM, RISC-V) all contain instructions for them.
  - touisteur 3y ago
    I mean permanently disable all speculative execution on a specific core and reduce/disable all side-channels of the kind. If you're saying I can do through injection of fence instructions between every instruction, coupled with isolcpus... I might have a fun weekend coming playing with Intel Pin. But I'm guessing the performance hit might be worse than 'just' disabling speculative execution on a core - if it was possible at all - or that the fence instructions might not be enough there? Haven't thought it through. But it would be a fun question to ask the likes of Daniel Gruss...
    - smallmancontrov 3y ago
      Yep. Memory fences are a sniper rifle, EIEIO+ is a shotgun, and side channel attacks are a knife fight.
- teaearlgraycold 3y ago
  > EIEIO, like on Old Macs This is what we should reserve Nobel prizes in computer science for
  - antod 3y ago
    FARM is begging for a good backronym
derefr 3y ago
Host cores and guest cores.
- touisteur 3y ago
  Something like this, yes.

smallmancontrov 3y ago

Bring back EIEIO, like on Old Macs, but perhaps with a slightly expanded definition of what constitutes I/O: Enforce In-order Execution of I/O (EIEIO) is an assembly language instruction used on the PowerPC central processing unit (CPU) which prevents one memory or input/output (I/O) operation from starting until the previous memory or I/O operation completed. This instruction is needed ] as I/O controllers on the system bus require that accesses follow a particular order, while the CPU reorders accesses to optimize memory bandwidth usage.

colejohnson66 3y ago
You mean memory fences? The big architecture (x86, ARM, RISC-V) all contain instructions for them.
- touisteur 3y ago
  I mean permanently disable all speculative execution on a specific core and reduce/disable all side-channels of the kind. If you're saying I can do through injection of fence instructions between every instruction, coupled with isolcpus... I might have a fun weekend coming playing with Intel Pin. But I'm guessing the performance hit might be worse than 'just' disabling speculative execution on a core - if it was possible at all - or that the fence instructions might not be enough there? Haven't thought it through. But it would be a fun question to ask the likes of Daniel Gruss...
  - smallmancontrov 3y ago
    Yep. Memory fences are a sniper rifle, EIEIO+ is a shotgun, and side channel attacks are a knife fight.
teaearlgraycold 3y ago
> EIEIO, like on Old Macs This is what we should reserve Nobel prizes in computer science for
- antod 3y ago
  FARM is begging for a good backronym

derefr 3y ago

Host cores and guest cores.

touisteur 3y ago
Something like this, yes.