>CHERI was first prototyped as extensions of MIPS and RISC-V; it is currently being evaluated by Arm... Note there's also a RISC-V effort[0][1] to write an ext

>CHERI was first prototyped as extensions of MIPS and RISC-V; it is currently being evaluated by Arm... Note there's also a RISC-V effort[0][1] to write an extension specification proper. 0. https://jira.riscv.org/browse/RVS-2141?src=confmacro https://jira.riscv.org/browse/RVS-2141?src=confmacro 1. https://wiki.riscv.org/display/HOME/RISC-V+Specification+Status https://wiki.riscv.org/display/HOME/RISC-V+Specification+Sta...