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I'm not an electrical or thermal engineer, but even if we hit a wall as far as process sizes, couldn't they make bigger dies with more cores? Like, if we can't
by jbooth 14y ago
I'm not an electrical or thermal engineer, but even if we hit a wall as far as process sizes, couldn't they make bigger dies with more cores?
Like, if we can't get much smaller than a 12-nm process, couldn't we just make the die twice as big and put a big-ol heatsink on it to get to 128 cores or whatever?
It seems like architecture is still a bigger barrier than process size when it comes to getting >16 or >32 cores on the chip. How big will the current ring bus architecture that intel has scale?
- bryanlarsen 14y agocosts for larger dies do not scale linearly. A chip with twice the area is at least 4x as expensive, if not more, depending on many factors like defect density and die packing. But you're right that this is the direction that the industry will move if process innovation stops. As a process matures, defect rates drop, making larger chips more feasible.
- jbooth 14y agoThanks, I appreciate that. So basically, larger dies == greater chance a given chip has a defect, bigger cost and % of the wafer for each defective chip, and presumably more waste silicon on the wafer as well?