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My local university used to teach MIPS, and as of some years ago they’ve switched to RISC-V. The final assignment at the time I took it was to write a program
by aeldidi 2y ago
My local university used to teach MIPS, and as of some years ago they’ve switched to RISC-V.
The final assignment at the time I took it was to write a program which compiles a subset of ARM machine code into RISC-V machine code, which was a challenging but so rewarding thing for a younger me to cut my teeth on.
It was a surprisingly modern class too. The in-class material was learning about pipelining, instruction/memory latency, and general CPU concepts, while the assignment and lab material was focused on writing RISC-V assembly and implementing more and more complex programs.
- zer00eyz 2y agoIn my best dad voice... Son Im going to need to check your home work. This sounds like fun little project to learn risk v with. It's on my to do list with a million other things.
- gentleman11 2y agoMIPS is great. You can learn it in great depth and fully understand the whole microprocessor while compacting it into a single class. You can make your own adder and multiplier with logic gates. It’s a scope that you can actually master
- musicale 2y agoI agree. It's a shame that MIPS is mostly dead at this point. (And a moment of silence for SPARC and OpenSPARC T1/T2 in particular - full 64-bit CPUs that were used in production.) However, RISC-V shares most of the implementation benefits of MIPS, is unencumbered by IP issues, and seems to be steadily improving in terms of software and hardware support.
- phire 2y agoRISC-V has slightly more complicated instruction formats, but is otherwise feels a lot like a cleaned up and simplified MIPS. The fact that you can easily see MIPS's 16 bit and (most of) 26 bit immediates in a hex editor is one low-key advantage (for teaching) that MIPS has over RISC-V. But overall RISC-V is a much better teaching ISA. One great thing about is that there is a core version of the RISC-V spec that only has 47 instructions and essentially nothing else. There is no Memory Paging or Privileged Supervisor mode, and you can skip implementing proper exceptions to make the design even simpler.
- NoGravitas 2y agoWe learned MIPS assembly as a small part of the computer architecture class at my university, in the first half of the 90s. It makes sense that RISC-V is the modern choice.