This is not a limitation, because it is the same for almost all other methods of making integrated circuits, where the transistors are also made inside a very t

This is not a limitation, because it is the same for almost all other methods of making integrated circuits, where the transistors are also made inside a very thin superficial layer. Only now, for the next generations of CMOS manufacturing processes, there are some experimental technologies to make pairs of transistors that are stacked one over the other, to double the areal density of transistors. For now, the most significant problem for becoming able to make integrated circuits on graphene is to find methods to make better electrical contacts between the metal layers required for interconnections and the graphene transistors. The methods currently known introduce series resistances that are large, negating the intrinsic speed advantage of the graphene.