Similar with PC BIOSes from before x86 CPUs got internal cache. The DRAM wasn't usable until it was properly set up (refresh, and possibly timing parameters on

Similar with PC BIOSes from before x86 CPUs got internal cache. The DRAM wasn't usable until it was properly set up (refresh, and possibly timing parameters on later chipsets). One trick I've seen in BIOS code is basically return-oriented programming[1]: before a "call", the stack pointer is set to some location in ROM containing one or more return addresses. The advantage over putting the return address itself in some register is that this way, it can use subroutines ending in a normal RET instruction, that might also be called later when there is an actual stack. [1] https://en.wikipedia.org/wiki/Return-oriented_programming https://en.wikipedia.org/wiki/Return-oriented_programming