4 ms·

Again, I know basically nothing about hardware, so this is likely a dumb question: could you conceivably get an oscillator/clock chip that also operates at 1/20

Again, I know basically nothing about hardware, so this is likely a dumb question: could you conceivably get an oscillator/clock chip that also operates at 1/20th the speed, wire that into the Apple ][, and then wire in this giant CPU?

duskwuff 3y ago
Unfortunately, no. The CPU would work, but memory retention would be unreliable (because the DRAM is now going ~20x too long between refreshes), and the composite video output would fail to display on a monitor (because it's the wrong frequency).
- tombert 3y ago
  Well now I'm wondering; it might not directly run an Apple ][, but what about the Apple ][ compatibles like the Laser 128 [1]? It doesn't use the same ROM as Apple, they licensed Microsoft Basic directly from Microsoft and then added the missing functionality themselves. I guess someone would have to see how similar it is to a vanilla Apple ][. [1] https://en.wikipedia.org/wiki/Laser_128 https://en.wikipedia.org/wiki/Laser_128
  - duskwuff 3y ago
    From what I can tell from documents like [1], the Laser 128 was very similar (possibly even identical) to an Apple II on a hardware level. It'd have the same issues running at a higher/lower clock speed than it was designed for. [1]: http://www.applelogic.org/files/VTECHL128.pdf http://www.applelogic.org/files/VTECHL128.pdf
  - anyfoo 3y ago
    Again, the answer is almost certainly no, unfortunately. A Laser 128 isn't that fundamentally different to an actual Apple II. In fact, from a wider point of view, they are "almost identical". DRAM needing timely refresh is universal to DRAM itself: It's because DRAM is literally made of a transistor and a capacitor holding your bit, and if you don't access it every so often, that capacitor discharges eventually. The most realistic path to "slow DRAM" would be to replace DRAM with SRAM altogether, which is effectively made of transistors only, and holds its content as long as just power is applied. It's not that hard to replace DRAM with SRAM: Apart from not needing refresh, SRAM behaves similar to DRAM. It's just more expensive (and usually faster, which is also not a drawback), and the DRAM refresh, while not doing anything useful, wouldn't hurt. But as for video output, that's just a consequence of how Apple II's (most microcomputers of that era, actually) video output works: By literally controlling the electron gun in the CRT, with only some analogue electronics in between. The monitor however wants to move the electron beam at a certain speed (or, if you had a fancy Multisync monitor, a set or range of speeds). But even if that wasn't the case, the phosphor on the screen glows only for a short amount of time, so draw your picture too slow, and you will only see small parts of it. The latter can be demonstrated by just pointing a camera at a CRT. In all likeliness, the camera's frequency will be slightly off from the CRT's frequency, so that you capture different parts of the beam's path at each frame, simulating what it would look like if you'd slow down the beam itself: https://pub.mdpi-res.com/sensors/sensors-22-01871/article_deploy/html/images/sensors-22-01871-g010.png?1646125960 https://pub.mdpi-res.com/sensors/sensors-22-01871/article_de... Would it be possible to decouple the video output circuit from the microprocessor's timing? Absolutely! And this is in fact what virtually any modern computers has been doing for many decades by now: Even if you still can find analogue VGA with a CRT, that VGA card had its own clock that is completely independent of the CPU's clock. But that's just not how simple home computers of that era usually operated.
  - CamperBob2 3y ago
    1.023 MHz is basically the Apple ]['s fine structure constant. Change that, even by a tiny amount, and the whole universe comes unglued. Video, disk access, you name it. There were accelerator boards, but they ran at integer multiples of the original clock speed for that reason.
jameshart 3y ago
You’d need to run an NTSC screen at 3Hz
- basementcat 3y ago
  You’ll need additional circuitry to "upscan" your 3Hz display to 60Hz. There was a moment many years ago when I considered constructing a mechanical 6502. I quickly learned that transistors are fabricated in silicon for economic reasons.
  - anyfoo 3y ago
    The fun path would be to modify the display to run at 3Hz (and also implying the much slower horizontal scan rate), but due to the phosphor coating's short persistence, you'd at best see only a small sliver of the full picture at any time. Exactly like you see if you point a video camera to a CRT whose frequency does not match up exactly. But if you'd take a long exposure photo of the CRT, it would likely work! (EDIT: Might fry your phosphor, though... as for any other components, like filters or components that may get damaged by the now only slowly changing current, I just assume you replaced or retuned that as part of the conversion process.)
    - userbinator 3y ago
      There are CRTs with long-persistence phosphors too; they found applications in radar and the like: https://en.wikipedia.org/wiki/Phosphor#Standard_phosphor_types https://en.wikipedia.org/wiki/Phosphor#Standard_phosphor_typ... https://tubetime.us/index.php/2015/10/31/crt-phosphor-video/ https://tubetime.us/index.php/2015/10/31/crt-phosphor-video/ http://www.labguysworld.com/crt_phosphor_research.pdf http://www.labguysworld.com/crt_phosphor_research.pdf The P10 phosphor there claims "Persistence from several seconds to several months"(!)
pulvinar 3y ago
Due to the way the video is interleaved with CPU cycles, you'd have to do something like divide the 1 MHz CPU clock by 20, and then when writing carefully only put data on the data bus for one of those 20 cycles. And the disk accesses would surely fail due to the CPU not keeping up, among other problems. http://www.apple-iigs.info/doc/fichiers/TheappleIIcircuitdescription1.pdf http://www.apple-iigs.info/doc/fichiers/TheappleIIcircuitdes...
- anyfoo 3y ago
  Thinking more and more about it in this thread (yes, I'm procrastinating doing something else), I'm beginning to come to the conclusion that the way with the least modifications to the computer itself is to replace the DRAM with SRAM, and to "just" slow the video circuit down as well (including color burst, horizontal scan, etc.), but to attach a custom buffered display instead of a regular monitor to the computer. However, I wouldn't be surprised in the slightest if any other of the integrated circuits don't work at the slower speed for some reason. (Filters etc. you'd just replace/retune.)
rogerbinns 3y ago
It is well worth understanding how these older computers worked. All the components were doing double or triple duty, so that together all the tasks like refreshing memory, reading/writing memory, generating video, generating audio, and I/O worked. This involved interleaving bus access and similar "tricks". There are an excellent series of talks at CCC titled "The Ultimate X talk" [0] where you are shown exactly how. I recommend The Ultimate Acorn Archimedes Talk [1] which introduced the ARM chip, but also shows how shared bus access and optimisation was the core principle of performant designs at the time. [0] https://media.ccc.de/search/?q=the+ultimate+talk https://media.ccc.de/search/?q=the+ultimate+talk [1] https://media.ccc.de/v/36c3-10703-the_ultimate_acorn_archimedes_talk https://media.ccc.de/v/36c3-10703-the_ultimate_acorn_archime...

duskwuff 3y ago

Unfortunately, no. The CPU would work, but memory retention would be unreliable (because the DRAM is now going ~20x too long between refreshes), and the composite video output would fail to display on a monitor (because it's the wrong frequency).

tombert 3y ago
Well now I'm wondering; it might not directly run an Apple ][, but what about the Apple ][ compatibles like the Laser 128 [1]? It doesn't use the same ROM as Apple, they licensed Microsoft Basic directly from Microsoft and then added the missing functionality themselves. I guess someone would have to see how similar it is to a vanilla Apple ][. [1] https://en.wikipedia.org/wiki/Laser_128 https://en.wikipedia.org/wiki/Laser_128
- duskwuff 3y ago
  From what I can tell from documents like [1], the Laser 128 was very similar (possibly even identical) to an Apple II on a hardware level. It'd have the same issues running at a higher/lower clock speed than it was designed for. [1]: http://www.applelogic.org/files/VTECHL128.pdf http://www.applelogic.org/files/VTECHL128.pdf
- anyfoo 3y ago
  Again, the answer is almost certainly no, unfortunately. A Laser 128 isn't that fundamentally different to an actual Apple II. In fact, from a wider point of view, they are "almost identical". DRAM needing timely refresh is universal to DRAM itself: It's because DRAM is literally made of a transistor and a capacitor holding your bit, and if you don't access it every so often, that capacitor discharges eventually. The most realistic path to "slow DRAM" would be to replace DRAM with SRAM altogether, which is effectively made of transistors only, and holds its content as long as just power is applied. It's not that hard to replace DRAM with SRAM: Apart from not needing refresh, SRAM behaves similar to DRAM. It's just more expensive (and usually faster, which is also not a drawback), and the DRAM refresh, while not doing anything useful, wouldn't hurt. But as for video output, that's just a consequence of how Apple II's (most microcomputers of that era, actually) video output works: By literally controlling the electron gun in the CRT, with only some analogue electronics in between. The monitor however wants to move the electron beam at a certain speed (or, if you had a fancy Multisync monitor, a set or range of speeds). But even if that wasn't the case, the phosphor on the screen glows only for a short amount of time, so draw your picture too slow, and you will only see small parts of it. The latter can be demonstrated by just pointing a camera at a CRT. In all likeliness, the camera's frequency will be slightly off from the CRT's frequency, so that you capture different parts of the beam's path at each frame, simulating what it would look like if you'd slow down the beam itself: https://pub.mdpi-res.com/sensors/sensors-22-01871/article_deploy/html/images/sensors-22-01871-g010.png?1646125960 https://pub.mdpi-res.com/sensors/sensors-22-01871/article_de... Would it be possible to decouple the video output circuit from the microprocessor's timing? Absolutely! And this is in fact what virtually any modern computers has been doing for many decades by now: Even if you still can find analogue VGA with a CRT, that VGA card had its own clock that is completely independent of the CPU's clock. But that's just not how simple home computers of that era usually operated.
- CamperBob2 3y ago
  1.023 MHz is basically the Apple ]['s fine structure constant. Change that, even by a tiny amount, and the whole universe comes unglued. Video, disk access, you name it. There were accelerator boards, but they ran at integer multiples of the original clock speed for that reason.

jameshart 3y ago

You’d need to run an NTSC screen at 3Hz

basementcat 3y ago
You’ll need additional circuitry to "upscan" your 3Hz display to 60Hz. There was a moment many years ago when I considered constructing a mechanical 6502. I quickly learned that transistors are fabricated in silicon for economic reasons.
- anyfoo 3y ago
  The fun path would be to modify the display to run at 3Hz (and also implying the much slower horizontal scan rate), but due to the phosphor coating's short persistence, you'd at best see only a small sliver of the full picture at any time. Exactly like you see if you point a video camera to a CRT whose frequency does not match up exactly. But if you'd take a long exposure photo of the CRT, it would likely work! (EDIT: Might fry your phosphor, though... as for any other components, like filters or components that may get damaged by the now only slowly changing current, I just assume you replaced or retuned that as part of the conversion process.)
  - userbinator 3y ago
    There are CRTs with long-persistence phosphors too; they found applications in radar and the like: https://en.wikipedia.org/wiki/Phosphor#Standard_phosphor_types https://en.wikipedia.org/wiki/Phosphor#Standard_phosphor_typ... https://tubetime.us/index.php/2015/10/31/crt-phosphor-video/ https://tubetime.us/index.php/2015/10/31/crt-phosphor-video/ http://www.labguysworld.com/crt_phosphor_research.pdf http://www.labguysworld.com/crt_phosphor_research.pdf The P10 phosphor there claims "Persistence from several seconds to several months"(!)

pulvinar 3y ago

Due to the way the video is interleaved with CPU cycles, you'd have to do something like divide the 1 MHz CPU clock by 20, and then when writing carefully only put data on the data bus for one of those 20 cycles. And the disk accesses would surely fail due to the CPU not keeping up, among other problems. http://www.apple-iigs.info/doc/fichiers/TheappleIIcircuitdescription1.pdf http://www.apple-iigs.info/doc/fichiers/TheappleIIcircuitdes...

anyfoo 3y ago
Thinking more and more about it in this thread (yes, I'm procrastinating doing something else), I'm beginning to come to the conclusion that the way with the least modifications to the computer itself is to replace the DRAM with SRAM, and to "just" slow the video circuit down as well (including color burst, horizontal scan, etc.), but to attach a custom buffered display instead of a regular monitor to the computer. However, I wouldn't be surprised in the slightest if any other of the integrated circuits don't work at the slower speed for some reason. (Filters etc. you'd just replace/retune.)

rogerbinns 3y ago

It is well worth understanding how these older computers worked. All the components were doing double or triple duty, so that together all the tasks like refreshing memory, reading/writing memory, generating video, generating audio, and I/O worked. This involved interleaving bus access and similar "tricks". There are an excellent series of talks at CCC titled "The Ultimate X talk" [0] where you are shown exactly how. I recommend The Ultimate Acorn Archimedes Talk [1] which introduced the ARM chip, but also shows how shared bus access and optimisation was the core principle of performant designs at the time. [0] https://media.ccc.de/search/?q=the+ultimate+talk https://media.ccc.de/search/?q=the+ultimate+talk [1] https://media.ccc.de/v/36c3-10703-the_ultimate_acorn_archimedes_talk https://media.ccc.de/v/36c3-10703-the_ultimate_acorn_archime...