4 ms·

RISC-V: How a group of Berkeley researchers took over the chip industry

12 points by jaimeperla 3y ago

chrisjj 3y ago
Written by "AI"?
- johnea 3y ago
  What makes you say that? I'm not doubting, just wondering what symptoms make you suspiscous. The article does have a lot of fluffy text. It could be ~1/3 the length and still include the relevent information...
  - chrisjj 3y ago
    The shaggy dog story effect; the multiple numbered lists.
    - jaimeperla 3y ago
      I am the one who wrote it. Not necessarily the best writing, as English is not my first language, and I'm no professional writer, but it's not AI ;)
johnea 3y ago
The article has a section on the origination of RISC-V, but never mentions RISC-I through IV: "RISC-V is the eponymous fifth generation of his long series of cooperative RISC-based research projects at the University of California, Berkeley (RISC-I and RISC-II published in 1981 by Patterson, who refers[21] to the SOAR architecture[22] from 1984 as "RISC-III" and the SPUR architecture[23] from 1988 as "RISC-IV"). At this stage, students provided initial software, simulations, and CPU designs." https://en.wikipedia.org/wiki/RISC-V https://en.wikipedia.org/wiki/RISC-V
- TMWNN 3y ago
  > The article has a section on the origination of RISC-V, but never mentions RISC-I through IV: Highly relevant: <https://www.youtube.com/watch?v=xa0EzJPE5OI https://www.youtube.com/watch?v=xa0EzJPE5OI>
  - jaimeperla 3y ago
    Good point, and that's on me. Thanks for bringing it up!
RetroTechie 3y ago
Article gives a good overview, but skips a few key points: 1) Open ISAs have been around for a long time, notably for academic purposes. Many of those are just... simple. But not good jack-of-all-trades. More recently, some existing ISAs with high-performance, commercial implementations were opened up (Sparc, Power). 2) A spiritual predecessor (MIPS) was fairly successful back in the day. And lives on in Loongson. 3) Gaining traction took several tries (see eg. OpenRISC). And the "V" has meaning. So what's different with RISC-V? a) It's actually very well-designed. Modular, with modern demands in mind but an otherwise 'boring' ISA cherry-picking the best features of successful, existing ISAs. And designed for practical applications & scale from microcontrollers to datacenters. b) Tools used for early designs (simulators, FPGA boards, prototype silicon tapeout etc) have become much more accessible to hobbyists, universities, small startups etc. So the bar to join in & create implementations was far lower than say, 1..2 decades earlier. c) Timing of its introduction was pretty good. Open source software became commonplace. Open hardware gaining ground. But a good, scaleable, open ISA was lacking. Article emphasizes the "open" aspect heavily. But imho the reason industry jumped on it, was RISC-V bringing above factors together. $0.02 royalties/chip doesn't count, design flexibility + rapidly growing & maturing ecosystem does.
- jaimeperla 3y ago
  Thanks for these comments, I hadn't come across it in my research, but as you bring up, super relevant.

12 points by jaimeperla 3y ago

chrisjj 3y ago

Written by "AI"?

johnea 3y ago
What makes you say that? I'm not doubting, just wondering what symptoms make you suspiscous. The article does have a lot of fluffy text. It could be ~1/3 the length and still include the relevent information...
- chrisjj 3y ago
  The shaggy dog story effect; the multiple numbered lists.
  - jaimeperla 3y ago
    I am the one who wrote it. Not necessarily the best writing, as English is not my first language, and I'm no professional writer, but it's not AI ;)

johnea 3y ago

The article has a section on the origination of RISC-V, but never mentions RISC-I through IV: "RISC-V is the eponymous fifth generation of his long series of cooperative RISC-based research projects at the University of California, Berkeley (RISC-I and RISC-II published in 1981 by Patterson, who refers[21] to the SOAR architecture[22] from 1984 as "RISC-III" and the SPUR architecture[23] from 1988 as "RISC-IV"). At this stage, students provided initial software, simulations, and CPU designs." https://en.wikipedia.org/wiki/RISC-V https://en.wikipedia.org/wiki/RISC-V

TMWNN 3y ago
> The article has a section on the origination of RISC-V, but never mentions RISC-I through IV: Highly relevant: <https://www.youtube.com/watch?v=xa0EzJPE5OI https://www.youtube.com/watch?v=xa0EzJPE5OI>
- jaimeperla 3y ago
  Good point, and that's on me. Thanks for bringing it up!

RetroTechie 3y ago

Article gives a good overview, but skips a few key points: 1) Open ISAs have been around for a long time, notably for academic purposes. Many of those are just... simple. But not good jack-of-all-trades. More recently, some existing ISAs with high-performance, commercial implementations were opened up (Sparc, Power). 2) A spiritual predecessor (MIPS) was fairly successful back in the day. And lives on in Loongson. 3) Gaining traction took several tries (see eg. OpenRISC). And the "V" has meaning. So what's different with RISC-V? a) It's actually very well-designed. Modular, with modern demands in mind but an otherwise 'boring' ISA cherry-picking the best features of successful, existing ISAs. And designed for practical applications & scale from microcontrollers to datacenters. b) Tools used for early designs (simulators, FPGA boards, prototype silicon tapeout etc) have become much more accessible to hobbyists, universities, small startups etc. So the bar to join in & create implementations was far lower than say, 1..2 decades earlier. c) Timing of its introduction was pretty good. Open source software became commonplace. Open hardware gaining ground. But a good, scaleable, open ISA was lacking. Article emphasizes the "open" aspect heavily. But imho the reason industry jumped on it, was RISC-V bringing above factors together. $0.02 royalties/chip doesn't count, design flexibility + rapidly growing & maturing ecosystem does.

jaimeperla 3y ago
Thanks for these comments, I hadn't come across it in my research, but as you bring up, super relevant.