> It could use very little power and very little space and still be a very big bottleneck. I believe in chip design, this doesn't really happen (often). You ca

> It could use very little power and very little space and still be a very big bottleneck. I believe in chip design, this doesn't really happen (often). You can optimize the bottlenecks by allocating it more space and power. I interpret Keller's statement indirectly - given that modern x86 CPUs dedicate only a small part of its circuitry to decoding logic means that it's not a bottleneck (otherwise there would be more circuitry for it).