I have a few questions I haven't found satisfactory answers for in the existing papers: * Are modern patrol read engines guided by the memory access patterns t

I have a few questions I haven't found satisfactory answers for in the existing papers: * Are modern patrol read engines guided by the memory access patterns to respond to RowHammer style attacks? * How aggressive would a patrol read engine have to scan the DRAM to safely stay ahead of RowHammer induced bit-flips? * Would larger ECC words than the traditional 64+8 with multi-bit error correction change the game and allow us to build more reliable systems from DRAM with pattern vulnerabilities?