5 ms·
Nice write-up. Latest generation circuit simulators don't solve the whole R or RC matrix anymore but they deduce the circuit to an equivalent one between the t
by bgnn 3y ago
Nice write-up.
Latest generation circuit simulators don't solve the whole R or RC matrix anymore but they deduce the circuit to an equivalent one between the two points of interest during netlisting. If you have only resistors like this, it only makes sense to deduce it to a single equivalent resistor. This is one of the major simulation speed-up techniques enabling us to simulate more complicated circuits.
- pkoird 3y agoIt'd be cool to learn how one could reduce this resistances in this grid to an equivalent resistance. Perhaps you could share some insights?
- thsksbd 3y agoStallman's (or Sussman?) thesis back in the 70s dealt with something similar. Basically an "AI system" that solves circuits by transforming them to simpler circuits using heuristics. It even solves BJTs by assuming the state its run and then seeing if the circuit is self consistent.
- gus_massa 3y agoIt looks possible for finite circuits. I doubt there is a general method for infinite systems, because the details of the infinite network are difficult to automate. (For example, cut all the resistance that connect (x,0) and (x+1,0) when x is a prime number. The solution posted in the comments here assume a very even network, and adding some "random" cuts would break the symmetry.
- bgnn 3y agoI think there are numerical solutions possible for any network. Worst case solving KVL KCL to find the equivalent resistance between two nodes is an option. In a real circuit netlist the number of nodes is finite and often you can just ignore dangling resistances.
- bsder 3y agoGot a ref? I haven't seen anything like this in the DAC (Design Automation Conference) proceedings, but I could very well have missed it.
- bgnn 3y agoI don't think they disclosed their algorithms but both Cadence Spectre-X and Mentor AFS-XT have an "improved" RC matrix solver as they market it. I think Spectre-X was launched at DAC 2019, but I've been using it since 2018. AFS-XT is launched couple of years ago as a response. The main goal of RC reduction is post-layout simulation. With these simulators what you would see in the results is there is a primitive called RC, which doesn't exist in the netlist. You need to define an fmax of the circuit, and it will reduce RC routing parasitics to approximately create same delays within that frequency range with a much more reduced matrix. Netlisting take some time but simulation is like 10x faster due to this reduction. I'm mainly using FinFET processes, so each transistor comes with tens of parasitics annotated. For a moderately large design it's normal to have millions of R and C. There are also tools doing this on the extracted netlist directly by the way. Cadence's tool is called Quantus Standalone Reduction (qreduce).
- bsder 3y agoThanks for the breadcrumbs. I'll follow them around.