3 ms·
A 4116 DRAM chip with a 250 ns access time would have a 500 ns cycle time, so could read or write 2 million words per second. The Acorn people called this a 2 M
by jecel 3y ago
A 4116 DRAM chip with a 250 ns access time would have a 500 ns cycle time, so could read or write 2 million words per second. The Acorn people called this a 2 MHz memory. You could have shorter cycle times in "column mode" where you pulsed the /CAS signal only to access words in the same row and the Acorn designers made good use of that for the Electron (reading 8 bits from a 4 bit wide memory) and the ARM based Archimedes (fetching instructions other than jump, load or store as well as loading the video and audio FIFOs).
From one DRAM generation to the next the cycle time might be different for chips with the same access time. This allowed me to make the 512KB Macintosh faster than the 128KB one (http://www.merlintec.com/lsi/mac512.html http://www.merlintec.com/lsi/mac512.html).
- djmips 3y agoThat's a fantastic read! Thanks for sharing. What are you working on these days?
- jecel 3y agoThanks! I still design Smalltalk computers like I did back then but now I also design my own processors.
- tom_ 3y agoYou could also have shorter cycles times by just doing it and assuming it'll be fine. Acorn's Master Turbo uses 4864-2 DRAMs, which have a 150 ns access time/270 ns cycle time, for, I think, a max throughput of 1e9/270=3,703,703 bytes/sec - but the Master Turbo's 65c02 CPU runs at 4 MHz, and therefore requires 4,000,000 bytes/sec. And, somehow, it works...
- jecel 3y agoThat is probably similar to how you could use both sides of a single sided floppy. Both sides were tested and the factory ended up with a huge pile of floppies that passed both sides and a small pile that failed one side (and some that failed both sides and were discarded). The market wanted more single sided disks so they simply moved a number of floppies from the first pile to the second. That meant that you mostly likely got a double sided product when you paid for a single sided one. But it was a risk. Same thing of processor and memory speed bins.