6 ms·
RISC-V takes a different approach to branching, even compared to other RISC processors. There are no status registers AKA condition codes.
by WillFlux 3y ago
RISC-V takes a different approach to branching, even compared to other RISC processors. There are no status registers AKA condition codes.
- brucehoult 3y agoMIPSr6 added RISC-V like compare and branch instructions.