Niagara-style (at least T1) design would have never worked in an application like this, because it compromised FPU power for the core count. 8 cores shared one

Niagara-style (at least T1) design would have never worked in an application like this, because it compromised FPU power for the core count. 8 cores shared one FPU! Niagara (all designs) heavily compromised single-thread performance, which could just mean time critical (5G or whatever) threads cannot complete on time. Niagara was an interesting idea, but not great for most applications.