This isn't fully correct. Drawn 7nm is like 20nm, but effective gate length is shorter due to short channel effects. So, this numbers are almost 1-to-1 reflecti

This isn't fully correct. Drawn 7nm is like 20nm, but effective gate length is shorter due to short channel effects. So, this numbers are almost 1-to-1 reflection of effective gate length. People mix up the transistor pitch with gate length. We can make small gate length devices but diffusion (source/drain) and contacts don't shrink as much, so we end up having a larger area needed for these.