I think it's the right chain of thought. You could either have 0/1 and then have additional nodes with negative activation functions, or -1/1 -1/1 is appealin

I think it's the right chain of thought. You could either have 0/1 and then have additional nodes with negative activation functions, or -1/1 -1/1 is appealing to me (0 = -1) because bit hackery could be used instead of the multiplication function, presumably on integral or fixed-point representations. The goal would be to eliminate any "if/then" like "if 0 do this if 1 do that" to avoid the need for branch prediction - there are bit-hackery ways to bypass this. That would lend itself well to all existing processors, ASICs, FPGAs, GPUs, etc.