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Intel already did on-package memory last year in a custom part for Asus that ran the memory at a higher clock speed than any other Raptor Lake part. It didn't a

Intel already did on-package memory last year in a custom part for Asus that ran the memory at a higher clock speed than any other Raptor Lake part. It didn't accomplish much because the memory interface was still just 128 bits, it shipped very late, and now there are systems with Intel or AMD processors running at the same memory frequencies using memory that's off package and merely soldered on the motherboard next to the CPU as is traditional for LPDDR. I don't think putting the memory in the package helps much with practically achievable clock speed or bus widths compared to just soldering the memory nearby. (Consoles and discrete GPUs aren't doing on-package memory despite running GDDR at significantly higher frequencies than LPDDR.) And given that, there's even less reason to expect a messy hybrid configuration with half the memory controller connected to on-package LPDDR5x and half routed to DIMM slots, whether or not it uses the AM5 socket.

bryanlarsen 3y ago
I wasn't suggesting hybrid, or at least didn't mean to. Memory with 2 different speeds is not well supported by the OS unless you dedicate one chunk to the GPU and the other to the CPU. So I don't think it's a good idea for AMD or Intel to go there. What I would suggest (and my suggestions are worth about as much as I'm getting paid to write this): AMD should create an I/O Die (IOD) with 512 bit DRAM memory width. Then create an AM5 variant with 128 of those connected to the socket and the other 384 tied off. Then create variants with 256 bit and 512 bits connected to on-package memory and no off-package memory pins. Sell those to laptop manufacturers. A big motivation on laptops is that slow & wide memory uses a lot less power than fast & narrow; on-package also uses a lot less power than driving the signal between chips. Then in early 2026 introduce AM6 with 4 channel 256 bit memory support. Sell AM5 & AM6 in parallel for a while.
- wtallis 3y ago
  Their existing chiplet approach is already horrible for laptops. Making the IO die bigger and more power hungry is not an option unless they switch to much more expensive packaging to get interconnect power down to reasonable levels.

bryanlarsen 3y ago

I wasn't suggesting hybrid, or at least didn't mean to. Memory with 2 different speeds is not well supported by the OS unless you dedicate one chunk to the GPU and the other to the CPU. So I don't think it's a good idea for AMD or Intel to go there. What I would suggest (and my suggestions are worth about as much as I'm getting paid to write this): AMD should create an I/O Die (IOD) with 512 bit DRAM memory width. Then create an AM5 variant with 128 of those connected to the socket and the other 384 tied off. Then create variants with 256 bit and 512 bits connected to on-package memory and no off-package memory pins. Sell those to laptop manufacturers. A big motivation on laptops is that slow & wide memory uses a lot less power than fast & narrow; on-package also uses a lot less power than driving the signal between chips. Then in early 2026 introduce AM6 with 4 channel 256 bit memory support. Sell AM5 & AM6 in parallel for a while.

wtallis 3y ago
Their existing chiplet approach is already horrible for laptops. Making the IO die bigger and more power hungry is not an option unless they switch to much more expensive packaging to get interconnect power down to reasonable levels.