>I do know that if the instruction set decodes efficiently and is compact (to reduce memory bandwidth) it really doesn't matter much beyond that. RISC-V is als

>I do know that if the instruction set decodes efficiently and is compact (to reduce memory bandwidth) it really doesn't matter much beyond that. RISC-V is also simple, and that's relative to ARM64, nevermind x86. I.e. it is achieving highly competitive code density and instruction count despite being simpler.