3 ms·
Interesting, thanks. A quick note, SPARC designers apparently did not talk to the compiler writers so didn't understand how much inlining could do, and implemen
by _a_a_a_ 3y ago
Interesting, thanks. A quick note, SPARC designers apparently did not talk to the compiler writers so didn't understand how much inlining could do, and implemented register windows as the wrong solution. Conversely I understand the alpha AXP ISA was designed with the hardware and compiler writers pretty much in the same room, and its beautiful and fast.
If I understand you correctly, I think the solution is to have ISA-independent low-level code (ANDF and C-- were/are examples)
I think register pages might bring you right back into the same issue as register windows; blocking of 000 execution.
Given the extraordinary cost of cache I think the idea of scratchpad memory is very promising, but I don't know how it would best be exposed to the compiler.