It's actually a bit more bogus than that. If I can tolerate occasional bit errors -- which ECC permits -- I can reduce my power consumption by far more than the

It's actually a bit more bogus than that. If I can tolerate occasional bit errors -- which ECC permits -- I can reduce my power consumption by far more than the overhead of ECC. Right now, I power rails set to where billions of bits to never flip. If I can tolerate a one-in-a-billion bit flip, my tolerances go up a lot, and power consumption goes down by a similar factor. Properly implemented, ECC would likely cut power while increasing reliability. "Properly implemented" only happens in volume. That sort of optimization makes no sense for the very limited volumes ECC has today. Neither do a lot of other optimizations.