x86 at least has it being more CISCy on its side, with a read/write potentially being inlined into another instruction (perhaps that's the only significant thin

x86 at least has it being more CISCy on its side, with a read/write potentially being inlined into another instruction (perhaps that's the only significant thing but it's still relatively meaningful). I'm sure intel & AMD know fully well that there's lots of benefit to decoding wider, it's just significantly more expensive to do so on x86 than it is on aarch64 and thus they spend silicon where it's more effective to do so.