Mill Computing thinks so, with their "The Mill" architecture. Its proponents have sometimes described it as "Itanium done right". The Mill uses a variable leng

Mill Computing thinks so, with their "The Mill" architecture. Its proponents have sometimes described it as "Itanium done right". The Mill uses a variable length encoding at the bit level. They also avoid encoding destination registers. This alleviates one large drawback of VLIW: code density. Itanium itself has ~42-bit instructions: combined with EPIC, even highly optimised, the code density was often less than half that of contemporary RISC architectures. Many Mill instructions are 16-24 bits wide. Mill programs are also supposed to be distributed in an intermediate format (think LLVM-IR, WebAssembly or ANDF), to be compiled at install-time. This is supposed to decouple the platform in the long run from the actual instruction set on that particular CPU, allowing the instruction encoding to change between models. However, Mill Computing has worked on their design for many years now without any product announcements. Many are afraid that its patents will expire or be sold before they get anything released. What I personally like most about the architecture is not the promised performance but features for program security and microkernels.