3 ms·
I assume it's probably an 1800 core wafer and they just cut fuse off the 200 defective cores. Some redundancy is likely just built-in based on the expectations
by arcticbull 3y ago
I assume it's probably an 1800 core wafer and they just cut fuse off the 200 defective cores. Some redundancy is likely just built-in based on the expectations of process reliability.
Probably multiple networking blocks, too, and you'd use less demanding process features on the things that can't be duplicated. In fact you could probably even have FPGA-style soft programmable fabric interconnects to work around process failures.
- ethbr1 3y agoThat's great if it's just hitting compute cores. But when your wafer networking flows through cores (because it's cores-all-the-way-down), a defective core starts to impact network performance. Which cascades into cache, memory, locality, etc. Which starts to make a very unpredictable hardware system for software to reason about. See also dragontamer's comment down below.
- fspeech 3y agoNot all transistors have to yield the same. You can use more forgiving design rules to ensure that critical network elements don't fail. There is also post fabrication repair. It all comes down to economics. There is no fundamental problem engineering wise.
- adgjlsfhk1 3y agoalso the networking is a small fraction of the area so you naturally expect it to have fewer defects
- nerpderp82 3y agoCerebras already solved this problem. So we have that existence proof. The redundancy overhead in v1 was 1-1.5%, and reportedly half that for v2 WSE. https://www.youtube.com/watch?v=8i1_Ru5siXc https://www.youtube.com/watch?v=8i1_Ru5siXc