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While your hypervisor may not implement it, ARM allows you to configure this kind of operations. See for example https://developer.arm.com/documentation/ddi05
by kramerger 3y ago
While your hypervisor may not implement it, ARM allows you to configure this kind of operations.
See for example
https://developer.arm.com/documentation/ddi0595/2020-12/AArch64-Registers/HDFGWTR-EL2--Hypervisor-Debug-Fine-Grained-Write-Trap-Register?lang=en https://developer.arm.com/documentation/ddi0595/2020-12/AArc...
- 1oooqooq 3y agooh qemu supports this alright, since 8.x but good luck 1. having a cpu with it (can't wait for arm laptops and needing caniuse.org for my assembly code), and 2. figuring out how to use it