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This thread brings to mind an issue I’ve wondered about: For hard real-time systems, do people use specialized CPU’s and hardware? Caches can introduce hard-to

This thread brings to mind an issue I’ve wondered about: For hard real-time systems, do people use specialized CPU’s and hardware? Caches can introduce hard-to-predict timing issues. I’m sure there are other aspects of modern hardware that present similar problems; large pipelines? Speculative instruction execution? Does Intel Time-Coordinated Computing address some of these hardware issues? Are there embedded CPU’s from TI, Intel, AMD, etc. that are specifically designed to support predictable and understandable “lockstep” hard real-time time behavior?

deschutes 3y ago
It's an interesting question and one I'm unqualified to answer. From a brief survey I gather at least caching is enabled for some hard real time systems. The name of the game seems to be employing caches in ways that provably decrease worst case execution time. For example, ignoring associativity, if your task's worst case working set fits into a given cache level, you can reason that the task misses each line at most once. That's almost certainly a dramatic improvement in wcet over cache disabled. Worst case execution time with pipelining should be similarly measurable given a worst case execution (which seems in any case necessary to demonstrate a bound on the task, even in a lockstep system). See https://cs-people.bu.edu/rmancuso/files/papers/cache_survey_CSUR15.pdf https://cs-people.bu.edu/rmancuso/files/papers/cache_survey_...