Somewhat related, there is ongoing work on an integrated (in vector registers) matrix extension for RISC-V: https://github.com/riscv-admin/integrated-matrix-ext

Somewhat related, there is ongoing work on an integrated (in vector registers) matrix extension for RISC-V: https://github.com/riscv-admin/integrated-matrix-extension/blob/main/charter.adoc https://github.com/riscv-admin/integrated-matrix-extension/b... They are currently discussing the data layout, as the extension should be vector length agnostic, just like the vector extension: Option A: One matrix per vector registers. Option B: One matrix in multiple vector registers. Option C: Multiple matrices in one vector register. Option D: Streaming buffers for the input matrices. Option E: Variable matrix representation. My favorite of the proposals so far, is to use the vector registers as the accumulator and add a small ammount of new state for the source operands (Option D): https://github.com/riscv-admin/vector/blob/main/minutes/2023/2023-10-30/option-d.pdf https://github.com/riscv-admin/vector/blob/main/minutes/2023...