3 ms·
> the addressing modes I like having aren't there, so I made an ISA with them Not really... Se my other comment: https://news.ycombinator.com/item?id=39042048
by mbitsnbites 3y ago
> the addressing modes I like having aren't there, so I made an ISA with them
Not really... Se my other comment: https://news.ycombinator.com/item?id=39042048 https://news.ycombinator.com/item?id=39042048
I'm not alone. Many others with far more experience and know-how in both ISA design and micro architecture design have the same opinions.
It's not that the RISC-V solution is "wrong" or "bad", it's just that it was designed to cater to all needs, including the super-simple very low end (the kind that you can implement from scratch in a weekend). I think that RISC-V does that very well, but it comes at a cost. Being good at everything pretty much precludes being the best in every segment.
MRISC32 tries to be one step up from RISC-V in terms of performance targets (well, realistically MRISC64 would be that ISA), but one step down from AArch64 in terms of complexity.