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It's feasible to have compilers automatically figure out how to use novel ISA features. But designing a microarchitecture & logic based on a proposed ISA is sti
by tlb 3y ago
It's feasible to have compilers automatically figure out how to use novel ISA features. But designing a microarchitecture & logic based on a proposed ISA is still years of expert human labor, so it's hard to evaluate the performance (both ILP and clock speed) of a novel ISA.
- londons_explore 3y agoI dunno - in some architectures, a new instruction is just a couple of lines of verilog to implement in the silicon: https://github.com/YosysHQ/picorv32/blob/master/picorv32.v#L1068 https://github.com/YosysHQ/picorv32/blob/master/picorv32.v#L... (this is the 'subtract' alu instruction decoder in pico riscv for example)
- rcxdude 3y agoThat is basically a toy example though. With a design like that you do just do the simple thing, but it's not fast or efficient
- rbanffy 3y agoIt's usually a better approach to link to libraries that decide at runtime (and save the decision somewhere) which is the optimal code path for a given architecture.