>You wouldn't be able to run P670s and X280s on and schedule applications between them anyways, because they have different vector lengths. Not trivial, but al

>You wouldn't be able to run P670s and X280s on and schedule applications between them anyways, because they have different vector lengths. Not trivial, but also not impossible. e.g. I understand there's some bits to check whether vector has been used. It would also be abnormal for a process to be in wait (as opposite to ready) within a vector loop. Having a chip like this one deployed will definitely enable experimentation and research on how to best deal with this situation.