42 ms·

> though sometimes things work that shouldn't Lol, so basically "undocumented opcodes, emulator edition"?

• kragen 3y ago
  i think the particular thing i ran into was that supposedly actual arms require an instruction cache flush before executing newly jit-compiled instructions and qemu didn't, so not exactly opcodes
  • vanderZwan 3y ago
    Oh that actually sounds like a much more plausible gotcha to trip over as a newbie who starts on qemu and then tries the same code on real hardware.
    • kragen 3y ago
      oh also i think qemu was supporting unaligned fetches (trapping on them on intel would be very expensive and not useful for running working programs), so i didn't notice that data in my data segment had gotten misaligned until i got a bus error on an actual arm. i don't think i saw an actual failure from the cache flushing thing