3 ms·

I wonder if any modern variants of these classic CPUs work on 3.3 TTL I/O voltage. I'd love to interface z80, 6502, 68k and such, without level shifting, to FP

by snvzz 3y ago

I wonder if any modern variants of these classic CPUs work on 3.3 TTL I/O voltage. I'd love to interface z80, 6502, 68k and such, without level shifting, to FPGAs supported by the open stack.

kragen 3y ago
why not just load a 6502 soft core into the fpga a 6502 is about 1200 gates i think, which is very roughly 400 4-luts https://github.com/emeb/ulx3s_6502 https://github.com/emeb/ulx3s_6502 simulates a 6502 on a lattice ecp5, using yosys, nextpnr, and the well-known (apparently! i'd never heard of it) https://github.com/Arlet/verilog-6502 https://github.com/Arlet/verilog-6502 documented at https://web.archive.org/web/20230604005701/https://c-scape.nl/arlet/fpga/6502/ https://web.archive.org/web/20230604005701/https://c-scape.n... no word on how much of the fpga it uses reproducing the undocumented instructions will be more work but still will probably fit
- snvzz 3y ago
  >why not just load a 6502 soft core into the fpga Because a minimal such system would be a decent starting point for designing modern peripherals (on the same FPGAs, reusing HDL) for the actual classic computers. Doing everything inside the FPGA doesn't help in this case.
  - kragen 3y ago
    oh, that makes sense
cbm-vic-20 3y ago
According to their datasheets, the W65C02S and W65C816S, both still in production, can run up to 8MHz at 3.3V. They can also go down to 2MHz on 1.8V, or up to 14MHz on 5V. https://www.westerndesigncenter.com/wdc/documentation/w65c02s.pdf https://www.westerndesigncenter.com/wdc/documentation/w65c02... https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf https://www.westerndesigncenter.com/wdc/documentation/w65c81...
- snvzz 3y ago
  Cool. I also found digikey stocks some 68k variants that are 3v3. Sadly no 030 or 010 which are the ones I prefer, but 000 and the still expensive 060 :X.

3 ms·

I wonder if any modern variants of these classic CPUs work on 3.3 TTL I/O voltage. I'd love to interface z80, 6502, 68k and such, without level shifting, to FP

by snvzz 3y ago

I wonder if any modern variants of these classic CPUs work on 3.3 TTL I/O voltage. I'd love to interface z80, 6502, 68k and such, without level shifting, to FPGAs supported by the open stack.

kragen 3y ago
why not just load a 6502 soft core into the fpga a 6502 is about 1200 gates i think, which is very roughly 400 4-luts https://github.com/emeb/ulx3s_6502 https://github.com/emeb/ulx3s_6502 simulates a 6502 on a lattice ecp5, using yosys, nextpnr, and the well-known (apparently! i'd never heard of it) https://github.com/Arlet/verilog-6502 https://github.com/Arlet/verilog-6502 documented at https://web.archive.org/web/20230604005701/https://c-scape.nl/arlet/fpga/6502/ https://web.archive.org/web/20230604005701/https://c-scape.n... no word on how much of the fpga it uses reproducing the undocumented instructions will be more work but still will probably fit
- snvzz 3y ago
  >why not just load a 6502 soft core into the fpga Because a minimal such system would be a decent starting point for designing modern peripherals (on the same FPGAs, reusing HDL) for the actual classic computers. Doing everything inside the FPGA doesn't help in this case.
  - kragen 3y ago
    oh, that makes sense
cbm-vic-20 3y ago
According to their datasheets, the W65C02S and W65C816S, both still in production, can run up to 8MHz at 3.3V. They can also go down to 2MHz on 1.8V, or up to 14MHz on 5V. https://www.westerndesigncenter.com/wdc/documentation/w65c02s.pdf https://www.westerndesigncenter.com/wdc/documentation/w65c02... https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf https://www.westerndesigncenter.com/wdc/documentation/w65c81...
- snvzz 3y ago
  Cool. I also found digikey stocks some 68k variants that are 3v3. Sadly no 030 or 010 which are the ones I prefer, but 000 and the still expensive 060 :X.