11 ms·

how many addressing modes are there? in my mind, CISC vs RISC is more about the vast array of addressing modes on CISC vs load/store on RISC, rather than the ac

by joshu 3y ago

how many addressing modes are there? in my mind, CISC vs RISC is more about the vast array of addressing modes on CISC vs load/store on RISC, rather than the actual size of the ISA probably worth comparing to early MIPS or SPARC instead of modern ARM with extensions?

cmrdporcupine 3y ago
Exactly, it's not about the amount of instructions but of the modes those instructions can take. As I understand it, having primarily load-and-store / register to register instructions and avoiding complicated mode encodings that make various processor hw optimizations much easier, and make compiler writing a lot easier, too. Classic CISC chips were "fun" to write assembly for by hand... and RISC chips are not. But if you're writing a compiler...
- kragen 3y ago
  i would say the arm is fun to write assembly for by hand, in part because of its deviations from risc principles; i wrote a bit about the details last night in https://news.ycombinator.com/item?id=38899295 https://news.ycombinator.com/item?id=38899295
  - cmrdporcupine 3y ago
    Yeah it's true ARM isn't terrible the few times I've played with it. In contrast, I Verilog'd up my own homebuilt system with a RISC-V core, and didn't particularly reading/writing in the RISC-V instruction set.
    - kragen 3y ago
      yeah, risc-v is nicer than 8086 or i386 or even amd64, but it's not as nice as arm. 8086 was surely 'cisc' but it's a pain in the ass
      - cmrdporcupine 3y ago
        yeah my standard for "fun CISC" is the 68000, the first machine I truly wrote assembler for (after handrolling 6502 by POKEing opcodes). It was a pleasure. Though I don't miss big-endian, I can't think like that anymore.
        kragen 3y ago
        yeah, the 68000 is fantastic! but i think the arm has all the creature comforts of the 68000 and more (though not of the 68020)
        NikkiA 3y ago
        Makes me wonder what the m88k instruction set was like, sadly a quick search makes it look like the only programming manuals were (now expensive) physical books and there's no simple PDF online. edit: found it.. http://www.bitsavers.org/components/motorola/88000/MC88100_RISC_Microprocessor_Users_Manual_2ed_1990.pdf http://www.bitsavers.org/components/motorola/88000/MC88100_R... Looks moderately clean and easy
        kragen 3y ago
        in terms of systems design it looks pretty decent: 32 gprs, 51 instructions, load-store architecture, 20 megahertz, one instruction per clock for alu instructions, hardware floating point coprocessor, can do fp and memory concurrent with alu instructions, hardware multiplier, delay slot bit in branches, separate instruction and data memory buses. the big thing not specified in the manual is the price; a 20-mips processor costing US$10000 in 01988 is different from a 20-mips processor costing US$10. but of course what killed it was powerpc apparently the mmu was a separate chip? with the cache on it? and that's why this manual doesn't document the page table structure? so it was only questionably a microprocessor
        cmrdporcupine 3y ago
        of course what killed it was powerpc I thought it was already considered a failure before the arrival of the Power alliance? I seem to recall hearing about reliability etc problems with the few who tried it? I think NeXT went as far as building a box around it?
kragen 3y ago
agreed. in the end it turned out what mattered about risc was that they reduced the instructions, so each one did less, not the set mashey's famous retrospective on the vax and cisc vs. risc is at https://yarchive.net/comp/vax.html https://yarchive.net/comp/vax.html
- tux1968 3y ago
  For whatever reason, the PDF that is linked in that email, is temporarily unavailable, so here's an archived link: https://web.archive.org/web/20160312012246/http://www.cs.mipt.ru/docs/comp/eng/hardware/common/comparing_risc_and_cisc_proc/main.pdf https://web.archive.org/web/20160312012246/http://www.cs.mip...
  - kragen 3y ago
    thank you

by joshu 3y ago

cmrdporcupine 3y ago

Exactly, it's not about the amount of instructions but of the modes those instructions can take. As I understand it, having primarily load-and-store / register to register instructions and avoiding complicated mode encodings that make various processor hw optimizations much easier, and make compiler writing a lot easier, too. Classic CISC chips were "fun" to write assembly for by hand... and RISC chips are not. But if you're writing a compiler...

kragen 3y ago
i would say the arm is fun to write assembly for by hand, in part because of its deviations from risc principles; i wrote a bit about the details last night in https://news.ycombinator.com/item?id=38899295 https://news.ycombinator.com/item?id=38899295
- cmrdporcupine 3y ago
  Yeah it's true ARM isn't terrible the few times I've played with it. In contrast, I Verilog'd up my own homebuilt system with a RISC-V core, and didn't particularly reading/writing in the RISC-V instruction set.
  - kragen 3y ago
    yeah, risc-v is nicer than 8086 or i386 or even amd64, but it's not as nice as arm. 8086 was surely 'cisc' but it's a pain in the ass
    - cmrdporcupine 3y ago
      yeah my standard for "fun CISC" is the 68000, the first machine I truly wrote assembler for (after handrolling 6502 by POKEing opcodes). It was a pleasure. Though I don't miss big-endian, I can't think like that anymore.
      - kragen 3y ago
        yeah, the 68000 is fantastic! but i think the arm has all the creature comforts of the 68000 and more (though not of the 68020)
      - NikkiA 3y ago
        Makes me wonder what the m88k instruction set was like, sadly a quick search makes it look like the only programming manuals were (now expensive) physical books and there's no simple PDF online. edit: found it.. http://www.bitsavers.org/components/motorola/88000/MC88100_RISC_Microprocessor_Users_Manual_2ed_1990.pdf http://www.bitsavers.org/components/motorola/88000/MC88100_R... Looks moderately clean and easy
        kragen 3y ago
        in terms of systems design it looks pretty decent: 32 gprs, 51 instructions, load-store architecture, 20 megahertz, one instruction per clock for alu instructions, hardware floating point coprocessor, can do fp and memory concurrent with alu instructions, hardware multiplier, delay slot bit in branches, separate instruction and data memory buses. the big thing not specified in the manual is the price; a 20-mips processor costing US$10000 in 01988 is different from a 20-mips processor costing US$10. but of course what killed it was powerpc apparently the mmu was a separate chip? with the cache on it? and that's why this manual doesn't document the page table structure? so it was only questionably a microprocessor
        cmrdporcupine 3y ago
        of course what killed it was powerpc I thought it was already considered a failure before the arrival of the Power alliance? I seem to recall hearing about reliability etc problems with the few who tried it? I think NeXT went as far as building a box around it?

kragen 3y ago

agreed. in the end it turned out what mattered about risc was that they reduced the instructions, so each one did less, not the set mashey's famous retrospective on the vax and cisc vs. risc is at https://yarchive.net/comp/vax.html https://yarchive.net/comp/vax.html

tux1968 3y ago
For whatever reason, the PDF that is linked in that email, is temporarily unavailable, so here's an archived link: https://web.archive.org/web/20160312012246/http://www.cs.mipt.ru/docs/comp/eng/hardware/common/comparing_risc_and_cisc_proc/main.pdf https://web.archive.org/web/20160312012246/http://www.cs.mip...
- kragen 3y ago
  thank you