Yeah, the existing FPGA device subsystem has been pretty much worthless for upstream kernels for years now and the lack of a good userspace API is a big reason,

Yeah, the existing FPGA device subsystem has been pretty much worthless for upstream kernels for years now and the lack of a good userspace API is a big reason, so in practice everyone just bitbangs the bitstream over some QSPI interface and pulls the reset manually. Hopefully this can see the light of day at some point.