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> Instead, more modern CPU architectures have focused on implementing features that improve performance of the whole memory subsystem. The most important of th
by duskwuff 3y ago
> Instead, more modern CPU architectures have focused on implementing features that improve performance of the whole memory subsystem.
The most important of those features is register renaming. (You mentioned it briefly; the article doesn't touch on it at all.) When your CPU actually has a few hundred hardware registers -- which many modern CPUs do! -- the fact that your ISA only has names for a dozen or so of those suddenly becomes much less important.
> Some architectures (like arm) implemented load/store multiple instructions that more or less solved this problem
The LDM/STM instructions were removed in A64 (64-bit ARM), actually! They were clever at the time, but they're difficult to work around in the pipeline.
- ithkuil 3y agoWould it be possible to implement the STM/LDM with clever register renames and defer the actual spill into memory? EDIT: given that superscalar implementations already implement register renaming logic