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Register Windows were a very targeted solution to the problem of spilling temporary registers across function calls, mostly the demand that it put on the memory
by phire 3y ago
Register Windows were a very targeted solution to the problem of spilling temporary registers across function calls, mostly the demand that it put on the memory subsystem.
This extra hardware only helped that one problem, which is pretty wasteful.
Instead, more modern CPU architectures have focused on implementing features that improve performance of the whole memory subsystem.
Even a simple on-die data cache will go a long way to solving the memory bandwidth, as most spills and refills will hit the cache. But modern out-of-order designs have store buffers that will detect when the same address is stored, loaded and overwritten in quick succession, allowing the spilled value to avoid even hitting the L1 data cache. I believe some architectures (like AMD's Zen 3) can even eliminate the memory operation entirely, by detecting pairs of stores and loads and redirecting them to renaming registered.
The other issue caused by spills is the extra instructions themselves. Some architectures (like arm) implemented load/store multiple instructions that more or less solved this problem, but others just relied on extreme out-of-order execution to improve throughput of all instructions.
The article concluded that the idea of Register Windows went away because it was a bad idea that didn't really work in practice. But I think that's only half the reason, and that could have probably been fixed with some design iteration. The other half is that idea of Register Windows were simply unneeded after various improvements to the memory subsystem in general.
- duskwuff 3y ago> Instead, more modern CPU architectures have focused on implementing features that improve performance of the whole memory subsystem. The most important of those features is register renaming. (You mentioned it briefly; the article doesn't touch on it at all.) When your CPU actually has a few hundred hardware registers -- which many modern CPUs do! -- the fact that your ISA only has names for a dozen or so of those suddenly becomes much less important. > Some architectures (like arm) implemented load/store multiple instructions that more or less solved this problem The LDM/STM instructions were removed in A64 (64-bit ARM), actually! They were clever at the time, but they're difficult to work around in the pipeline.
- ithkuil 3y agoWould it be possible to implement the STM/LDM with clever register renames and defer the actual spill into memory? EDIT: given that superscalar implementations already implement register renaming logic
- Findecanor 3y ago> The article concluded that the idea of Register Windows went away because it was a bad idea that didn't really work in practice. But I think that's only half the reason, and that could have probably been fixed with some design iteration. The Itanium also got register windows but designed differently. First, the window size was variable, so that a function didn't have to allocate registers it didn't use. It also used a separate protected register stack. The architecture allowed registers to be spilled/filled automatically in the background in-between load and store-instructions instead of all at once, but I'm not sure that any implementation did that. BTW. The return pointer was also on the register stack, so it couldn't be overwritten by a buffer overflow.