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Ask HN: Are there any open source dual-issue RISC-V processor
AFAK, there are quite a few open source risc-v core implementations, some among them are dual-issue, such as swerv-eh2 which developed by Western Digital, and biriscv which is personal development.
Could anyone provice more open source implementations for learning?
- snvzz 3y agohttps://github.com/suryakantamangaraj/AwesomeRISC-VResources?tab=readme-ov-file#open-source-implementations https://github.com/suryakantamangaraj/AwesomeRISC-VResources...
- zhongchengyong 3y agoThat's cool, but it's outdated
- Rushfoxsea 3y agohttps://opencores.org/projects/biriscv https://opencores.org/projects/biriscv
- camel-cdr 3y agoThis is the most advanced open source risc-v implementation I'm awair of: https://github.com/OpenXiangShan/XiangShan https://github.com/OpenXiangShan/XiangShan
- snvzz 3y agoThere is Vroom. https://moonbaseotago.github.io/ https://moonbaseotago.github.io/ But I am a bit concerned there's no visible activity since July.
- vitarnixofntrnt 3y ago[dead]