5 ms·

I could even say that writing vhdl code for it would be very straightforward, maybe even more so than some of the stuff already made.

• Natsu 15y ago
  There's already a pipelined DCPU-16 Verilog implementation: http://sybreon.github.com/dcpu16/ http://sybreon.github.com/dcpu16/
  • lawn 15y ago
    Awesome.
  • radarsat1 15y ago
    I should have known :)