I was thinking of writing about the self-test circuitry. It doesn't expose things in a JTAG-like way, which came later. The main self-test is that if you boot t

I was thinking of writing about the self-test circuitry. It doesn't expose things in a JTAG-like way, which came later. The main self-test is that if you boot the chip with the BUSY pin set, it goes through a self-test of all the PLA and microcode entries, accumulating a signature using linear-feedback shift registers. It then XORs with the correct value and writes the result to a register. So the visible result is you see 0 in a register, not too exciting. There are also self-test instructions to do things such as write entries to the TLB and read entries, to make sure it is operating correctly. For details, there's a paper on "Design and Test of the 80386" by Pat Gelsinger, who is now CEO of Intel. https://ieeexplore.ieee.org/document/4069991 https://ieeexplore.ieee.org/document/4069991 (paywalled).