3 ms·
My favorite part of the 6502 is that you can write the instruction set as 4 columns by 8 rows, and see the really simple pattern. https://pastebin.com/rCN932a0
by Dwedit 3y ago
My favorite part of the 6502 is that you can write the instruction set as 4 columns by 8 rows, and see the really simple pattern.
https://pastebin.com/rCN932a0 https://pastebin.com/rCN932a0
When you see it in rows and columns, you can see how you have these addressing modes that correspond to the row number most of the time:
0: X,indirect
1: zeropage
2: immediate
3: absolute
4: indirect,Y
5: zeropage,X
6: absolute,Y
7: absolute,X
Then you can see that Column 2 is the arithmetic instructions: ORA, AND, EOR, ADC, STA, LDA, CMP, SBC
And column 3 is the Read-Modify-Write instructions: ASL, ROL, LSR, ROR, STX, LDX, DEC, INC.
And that fourth column of invalid instructions turns out to be a combination of the second and third column, effectively doing an arithmetic operation and a RMW operation at the same time, even for addressing modes normally not supported.
- wvenable 3y agox86 has a similar regular instruction pattern except that it's in octal: https://gist.github.com/seanjensengrey/f971c20d05d4d0efc0781f2f3c0353da https://gist.github.com/seanjensengrey/f971c20d05d4d0efc0781...
- systems_glitch 3y agoYup, that inherits from the 8080. The RST instructions made so much more sense after reading that in one of the Intel handbooks!