2 ms·
Actually each of those x86 CPUs probably has at least two AVX FMA units, and can issue 16xFP32 FMAs per cycle – it’s at least “64 AVX cores”! :)
by jrk 3y ago
Actually each of those x86 CPUs probably has at least two AVX FMA units, and can issue 16xFP32 FMAs per cycle – it’s at least “64 AVX cores”! :)
- kimixa 3y agoDoesn't zen4 have 2x 256-bit FADD and 2x 256-bit FMA, and with avx512 ops it double-pumps the ALU (a good overview here [0]). If you count FADD as a single flop and FMA as 2, that's 48 "1 flop cores" per core. I think it's got the same total FP ALU resources as zen3, and shows how register width and ALU resources can be completely decoupled. [0] https://www.mersenneforum.org/showthread.php?p=614191 https://www.mersenneforum.org/showthread.php?p=614191