3 ms·
I'll admit I have a fever so perhaps that is why, but you're not making much sense to me. It's not like we haven't had ISAs spanning different core architectur
by magicalhippo 3y ago
I'll admit I have a fever so perhaps that is why, but you're not making much sense to me.
It's not like we haven't had ISAs spanning different core architectures already. Take Intel's NetBurst (Pentium 4) vs Core (Core 2 Duo fex) architectures. Same ISA, quite different optimization targets.
I don't see why RISC-V will be different in this regard.
Of course relying on higher-level languages with JIT compliation is a thing, thats why Julia[1] exists. And with RISC-V you do have those extensions that languages like Julia could take advantage of. But it would have to be implemented in Julias complier and libraries, there's no free lunch.
[1]: https://julialang.org/ https://julialang.org/
- eigenspace 3y ago> But it would have to be implemented in Julias complier and libraries, there's no free lunch. Actually, for the most part Julia itself doesn't need to be concerned at all with the ISA or hardware differences. That's mostly LLVM's job. So yes, someone does need to implement it, but many languages would get to benefit from that work, not just Julia. It may not be a free lunch, but you can pay for one lunch and feed many mouths.
- HybridCurve 3y agoI don't think it has anything to do with your fever- the post looks like autogenerated garbage. Below they were speaking about "planned obsolescence of compilers" which makes no sense as many make efforts to support legacy architectures.